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IBM Fellow Andrew Walls thinks most if not all active data will eventually reside on flash storage, and when Walls speaks, IBM Storage listens.
Walls is responsible for setting the strategy for the company’s storage portfolio and defining the architecture for next-generation flash arrays and storage class memories. He received the highest distinction of his career this year when IBM named him a fellow, making him one of only 257 total and 87 active IBM employees (out of more than 400,000) to achieve the honor.
On the eve of next week’s Flash Memory Summit in Santa Clara, California, Walls took time out today to discuss IBM’s flash strategy with SearchStorage.com. Interview excerpts follow:
What do you see as the optimal architecture for next-generation flash?
Walls: I’ve been with the acquisition of Texas Memory Systems since its beginning, and before that, I was the chief architect and CTO for our flash strategy. Through the years, we’ve adapted to what’s been happening, and I think the tipping point is there, and we really are at a point where data reduction combined with the technology that we have today can be used to put all active data, or most active primary data, on flash.
So, I see the future being to continue that reduction in overall cost per gigabyte, based on data reduction and next-generation flash, as well as enabling things like [triple-level cell] TLC, if possible, to continue lowering the cost, but to do that perhaps as a tiering strategy and to also look at next-generation storage class memories also with tiering and decrease the latency by being able to use phase-change memory or resistive RAM or next-generation storage class memories as the tier for hot data.
I see continuing with certainly the [multi-level cell] MLC flash that is there, continuing to reduce the cost, do more features and data reduction, but then looking at other technologies to see if they also can be used in the all-flash arrays to improve the performance and further decrease the cost.
Do you think TLC is realistic for enterprise storage? Will it be TLC or 3D NAND?
Walls: I think 3D NAND for sure is going to come in. Back in 2008, 2009, we were working closely with different companies, and we said MLC was going to come into the enterprise. There were a lot of people who said, ‘No, it’s going to be [single-level cell] SLC for a long time.’ And we were the first to really bring MLC into enterprise storage.
When I look at TLC, it’s even more of a challenge, of course. You’re talking about in some cases a few hundred cycles. But, we are looking to see if we can bring it in in innovative ways . . . You could think of maybe read-mostly applications or a tiered architecture where most of the hot accesses are serviced out of DRAM or out of MLC, and you’d have some TLC. We think that the benefits are enough that it really [merits] a serious look to see if it can also be used to further reduce the costs.
IBM’s all-flash arrays use eMLC flash in contrast to a lot of purpose-built flash arrays that use cheaper MLC drives. How important is the type of flash these days now that manufacturers have figured out ways to improve the reliability and endurance? Why is IBM still using eMLC?
Walls: It is true to a certain extent that the flash manufacturers have figured out how to improve the endurance of the devices themselves. However, as the geometries continue to shrink, the endurance that you get out of the 20-nanometer and 15- or 16-nanometer bare MLC flash is only 3,000 write/erase cycles. That’s all that the manufacturer will guarantee.
So, we believe that in this generation with the [FlashSystem] 840 that the eMLC allows us . . . to be able to get a 10x improvement in endurance without having to worry about it and pass that on to our customers. We think eMLC right now is a very valuable add, and other competitors use it as well. There are many who don’t, but I think one has to be careful to see how they make sure that they aren’t going to wear out. We believe eMLC right now is an important part of our strategy.